API Reference

class HDH:
    """A Hybrid Dependency Hypergraph: a quantum workload as states (nodes)
    joined by the operations between them (hyperedges).

    Usually built by a model (`Circuit`, `MBQC`, `QW`, `QCA`) or a
    converter such as `from_qiskit`. Each node is the state of one wire at one
    timestep, with ID ``"<wire>_t<time>"``. Core attributes have a readable
    name and a formal one matching the HDH paper's notation; both refer to the
    same object.

    Examples:
        >>> hdh = HDH()
        >>> a = hdh.add_node("q0", 0)
        >>> b = hdh.add_node("q0", 1)
        >>> edge = hdh.add_hyperedge({a, b}, "q", name="h")
        >>> sorted(hdh.nodes)
        ['q0_t0', 'q0_t1']
        >>> hdh.hyperedge_types[edge], hdh.gate_name[edge]
        ('q', 'h')

    Attributes:
        nodes (S): All node IDs.
        hyperedges (C): All hyperedges, each a frozenset of node IDs.
        timesteps (T): All timesteps in use.
        node_types (sigma): Node -> ``"q"`` or ``"c"``.
        hyperedge_types (tau): Hyperedge -> ``"q"`` or ``"c"``.
        node_realisation (upsilon): Node -> ``"a"`` (always happens) or
            ``"p"`` (only if a classical condition holds).
        hyperedge_realisation (phi): Hyperedge -> ``"a"`` or ``"p"``.
        time_map: Node -> its timestep.
        wire_of: Node -> the wire it is a state of. Partitioners count
            capacity per quantum wire.
        gate_name: Hyperedge -> the operation that produced it, e.g.
            ``"cx_stage2"``.
        gate_params: Hyperedge -> gate parameters, when recorded.
        edge_args: Hyperedge -> data the converters use to rebuild a circuit.
        edge_role: Hyperedge -> ``"teledata"`` or ``"telegate"``, once assigned.
        edge_metadata: Free-form per-hyperedge metadata.
        motifs: Reserved; unused by the core API.
    """

    def __init__(self):
        self.S: Set[NodeID] = set()
        self.C: Set[Hyperedge] = set()
        self.T: Set[TimeStep] = set()
        self.sigma: Dict[NodeID, str] = {}  # node types, a NodeType value
        self.tau: Dict[Hyperedge, str] = {}  # hyperedge types, a NodeType value
        self.upsilon: Dict[NodeID, str] = {} # node realization, a Realisation value
        self.phi: Dict[Hyperedge, str] = {} # hyperedge realization, a Realisation value
        self.time_map: Dict[NodeID, TimeStep] = {}  # f: S -> T
        self.wire_of: Dict[NodeID, str] = {}  # node -> the wire it is a state of
        self.gate_name: Dict[Hyperedge, str] = {}  # maps hyperedge → gate name string
        self.gate_params: Dict[Hyperedge, List[float]] = {}  # maps hyperedge → rotation params, if any
        self.edge_args: Dict[Hyperedge, Tuple[List[int], List[int], List[bool]]] = {} #mapping for nackwards translations
        self.edge_role: Dict[Hyperedge, str] = {}  # an EdgeRole value -> for primitive implementation
        self.motifs = {}
        self.edge_metadata: Dict[Hyperedge, Dict] = {}

    # Readable names for the formal attributes above (same objects, not copies).

    @property
    def nodes(self) -> Set[NodeID]:
        """All node IDs (`S` in the paper's notation)."""
        return self.S

    @property
    def hyperedges(self) -> Set[Hyperedge]:
        """All hyperedges (`C`)."""
        return self.C

    @property
    def timesteps(self) -> Set[TimeStep]:
        """All distinct timesteps (`T`)."""
        return self.T

    @property
    def node_types(self) -> Dict[NodeID, str]:
        """Node ID -> `"q"` or `"c"` (`sigma`)."""
        return self.sigma

    @property
    def hyperedge_types(self) -> Dict[Hyperedge, str]:
        """Hyperedge -> `"q"` or `"c"` (`tau`)."""
        return self.tau

    @property
    def node_realisation(self) -> Dict[NodeID, str]:
        """Node ID -> `"a"` or `"p"` (`upsilon`)."""
        return self.upsilon

    @property
    def hyperedge_realisation(self) -> Dict[Hyperedge, str]:
        """Hyperedge -> `"a"` or `"p"` (`phi`)."""
        return self.phi

    @staticmethod
    def node_id(wire: str, time: TimeStep) -> NodeID:
        """The ID `add_node` gives the state of `wire` at `time`: ``"<wire>_t<time>"``."""
        return f"{wire}_t{time}"

    def add_node(self, wire: str, time: TimeStep, node_type: NodeType = NodeType.QUANTUM,
                 node_real: NodeReal = Realisation.ACTUAL) -> NodeID:
        """Add the state of `wire` at `time` and return its node ID.

        The ID is ``"<wire>_t<time>"`` (see `node_id`) and the wire is recorded
        in `wire_of`. Re-adding an existing state is a no-op apart from updating
        `node_real`.

        Args:
            wire: Qubit, bit or model label, e.g. ``"q0"``, ``"c1"`` or ``"a"``.
            time: Timestep of this state.
            node_type: ``"q"`` (default) or ``"c"``, or a `NodeType`.
            node_real: ``"a"`` (default) or ``"p"``, or a `Realisation`.

        Returns:
            The node ID.

        Raises:
            TypeError: If called with the pre-0.5 signature
                ``add_node(node_id, node_type, time)``.
            ValueError: On an invalid type, or if the state already exists with
                another type.

        Examples:
            >>> hdh = HDH()
            >>> hdh.add_node("q0", 1)
            'q0_t1'
            >>> hdh.add_node("c0", 2, "c")
            'c0_t2'
        """
        if not isinstance(time, numbers.Integral) or isinstance(time, bool):
            raise TypeError(
                f"add_node(wire, time, node_type) expects an integer time, got {time!r}. "
                f"Since hdh 0.5 the node ID is built from the wire and time: "
                f"write add_node('q0', 1, 'q') instead of add_node('q0_t1', 'q', 1)."
            )
        if not isinstance(wire, str) or not wire:
            raise TypeError(f"wire must be a non-empty string, got {wire!r}")
        time = int(time)
        node_type = _coerce(NodeType, node_type, "node type")
        node_real = _coerce(Realisation, node_real, "node realisation")
        node_id = self.node_id(wire, time)
        existing_type = self.sigma.get(node_id)
        if existing_type is not None and existing_type != node_type:
            raise ValueError(
                f"Node '{node_id}' already exists with type '{existing_type}'; "
                f"cannot redefine it as type '{node_type}'. This usually means two "
                f"different logical values were mapped to the same wire label."
            )
        self.S.add(node_id)
        self.sigma[node_id] = node_type
        self.wire_of[node_id] = wire
        self.time_map[node_id] = time
        self.T.add(time)
        self.upsilon[node_id] = node_real
        return node_id

    def add_hyperedge(self, node_ids: Set[NodeID], edge_type: EdgeType, name: Optional[str] = None, node_real: EdgeReal = "a", role: Optional[EdgeRole] = None) -> Hyperedge:
        """Connect `node_ids` with a hyperedge representing one operation.

        Args:
            node_ids: The states the operation touches, inputs and outputs together.
            edge_type: ``"q"`` or ``"c"``, or a `NodeType`.
            name: Operation name, stored lower-cased in `gate_name`.
            node_real: ``"a"`` (default) or ``"p"``, or a `Realisation`.
            role: ``"teledata"`` or ``"telegate"``, usually assigned later by a
                partitioning pass.

        Returns:
            The hyperedge (a frozenset), used as the key into `hyperedge_types`,
            `gate_name` and the other per-edge maps.

        Raises:
            ValueError: If `edge_type`, `node_real` or `role` is invalid.

        Examples:
            >>> hdh = HDH()
            >>> q, c = hdh.add_node("q0", 0), hdh.add_node("c0", 1, "c")
            >>> edge = hdh.add_hyperedge({q, c}, "c", name="measure")
            >>> sorted(edge)
            ['c0_t1', 'q0_t0']
        """
        edge_type = _coerce(NodeType, edge_type, "edge type")
        node_real = _coerce(Realisation, node_real, "edge realisation")
        if role:
            role = _coerce(EdgeRole, role, "edge role")
        edge = frozenset(node_ids)
        self.C.add(edge)
        self.tau[edge] = edge_type
        self.phi[edge] = node_real
        if name:
            self.gate_name[edge] = name.lower()
        if role:
            self.edge_role[edge] = role
        return edge

    def get_ancestry(self, node: NodeID) -> Set[NodeID]:
        """Return nodes with paths ending at `node` and earlier time steps."""
        return {
            s for s in self.S
            if self.time_map[s] <= self.time_map[node] and self._path_exists(s, node)
        }

    def get_lineage(self, node: NodeID) -> Set[NodeID]:
        """Return nodes reachable from `node` with later time steps."""
        return {
            s for s in self.S
            if self.time_map[s] >= self.time_map[node] and self._path_exists(node, s)
        }

    def _path_exists(self, start: NodeID, end: NodeID) -> bool:
        """DFS to find a time-respecting path from `start` to `end`."""
        visited = set()
        stack = [start]
        while stack:
            current = stack.pop()
            if current == end:
                return True
            visited.add(current)
            neighbors = {
                neighbor
                for edge in self.C if current in edge
                for neighbor in edge
                if neighbor != current and self.time_map[neighbor] > self.time_map[current]
            }
            stack.extend(neighbors - visited)
        return False

    def get_num_qubits(self) -> int:
        """Return the number of logical qubits (quantum wires).

        Circuit-style wires ``q<index>`` report `max(index) + 1`, so a circuit
        using only qubits 0 and 4 reports 5, matching the register size a
        converter needs. If any quantum wire is named otherwise (MBQC or QCA
        labels), the count of distinct quantum wires is returned instead.

        Returns:
            int: number of qubits, or 0 if there are no quantum nodes.
        """
        wires = {self.wire_of[n] for n in self.S if self.sigma[n] == NodeType.QUANTUM}
        indices = [int(w[1:]) for w in wires if w[:1] == "q" and w[1:].isdigit()]
        if len(indices) != len(wires):
            return len(wires)
        return max(indices) + 1 if indices else 0

class NodeType(_StrEnum):
    """Whether a node (or hyperedge) carries quantum or classical information.

    Members compare equal to their values, so ``"q"`` and
    ``NodeType.QUANTUM`` are interchangeable wherever a type is expected.
    """
    QUANTUM = "q"
    CLASSICAL = "c"

class Realisation(_StrEnum):
    """Whether a node (or hyperedge) always happens, or only if a classical
    condition holds."""
    ACTUAL = "a"
    PREDICTED = "p"

class EdgeRole(_StrEnum):
    """Distribution primitive assigned to a cut hyperedge."""
    TELEDATA = "teledata"
    TELEGATE = "telegate"

@runtime_checkable
class Model(Protocol):
    """What a computational model must provide to be used with HDH.

    A model is any object that can translate the computation it describes
    into an `HDH`. `Circuit`, `MBQC`, `QW` and `QCA` all satisfy this
    Protocol; a new model only needs a `build_hdh` method, no base class.
    `tests/test_model_protocol.py` checks every registered model against the
    invariants below, so a new model should be added to its registry.

    The HDH returned by `build_hdh` must:

    - create every node with `HDH.add_node`, so each has a type, a time and
      a wire (qubit, bit, or model label);
    - keep each wire a single type (a label used for a classical result is
      never reused as a quantum state);
    - only connect nodes that exist;
    - keep quantum hyperedges free of classical nodes.

    Examples:
        >>> from hdh.models.circuit import Circuit
        >>> isinstance(Circuit(), Model)
        True
    """

    def build_hdh(self) -> HDH:
        """Translate the model's recorded operations into an HDH."""
        ...

class Circuit:
    """Gate-model circuit builder: record gates in order, then call `build_hdh`.

    Examples:
        >>> c = Circuit()
        >>> c.add_instruction("h", [0])
        >>> c.add_instruction("cx", [0, 1])
        >>> c.add_instruction("measure", [1])
        >>> hdh = c.build_hdh()
        >>> hdh.get_num_qubits()
        2
        >>> sorted({hdh.wire_of[n] for n in hdh.nodes})
        ['c1', 'q0', 'q1']
    """

    def __init__(self):
        self.instructions: List[
            Tuple[str, List[int], List[int], List[bool], Literal["a", "p"], Optional[List[float]]]
        ] = []  # (name, qubits, bits, modifies_flags, cond_flag, params)

    def add_instruction(
        self,
        name: str,
        qubits: List[int],
        bits: Optional[List[int]] = None,
        modifies_flags: Optional[List[bool]] = None,
        cond_flag: Literal["a", "p"] = "a",
        params: Optional[List[float]] = None,
    ):
        """Append a gate or measurement.

        Args:
            name: Gate name, e.g. ``"h"``, ``"cx"``, ``"rx"`` or ``"measure"``.
            qubits: Qubit indices, in order.
            bits: Classical bits. A measurement defaults to ``bits = qubits``.
            modifies_flags: Per qubit, whether the gate changes its state.
                Defaults to all True.
            cond_flag: ``"p"`` if the gate only happens when a classical
                condition holds (prefer `add_conditional_gate`), else ``"a"``.
            params: Gate parameters such as ``[theta]`` for ``"rx"``; kept on the
                HDH so converters can restore them.

        Examples:
            >>> c = Circuit()
            >>> c.add_instruction("rx", [0], params=[0.5])
            >>> hdh = c.build_hdh()
            >>> list(hdh.gate_params.values())
            [[0.5]]
        """
        name = name.lower()

        if name == "measure":
            modifies_flags = [True] * len(qubits)
        else:
            bits = bits or []
            modifies_flags = modifies_flags or [True] * len(qubits)

        self.instructions.append((name, qubits, bits, modifies_flags, cond_flag, params))

    def add_conditional_gate(
        self,
        classical_bit: int,
        target_qubit: int,
        gate_name: str,
        additional_qubits: Optional[List[int]] = None,
        modifies_flags: Optional[List[bool]] = None,
        params: Optional[List[float]] = None,
    ):
        """Append a gate that only applies when `classical_bit` is 1.

        The bit must already hold a value, typically from an earlier
        ``"measure"``. The gate's output states are marked predicted (``"p"``).

        Args:
            classical_bit: The controlling classical bit.
            target_qubit: Qubit the gate acts on.
            gate_name: Gate name, as in `add_instruction`.
            additional_qubits: Further qubits, for a multi-qubit conditional gate.
            modifies_flags: As in `add_instruction`.
            params: As in `add_instruction`.

        Examples:
            >>> c = Circuit()
            >>> c.add_instruction("h", [0])
            >>> c.add_instruction("measure", [0])
            >>> c.add_conditional_gate(0, 1, "x")
            >>> hdh = c.build_hdh()
            >>> sorted(n for n in hdh.nodes if hdh.node_realisation[n] == "p")
            ['q1_t3']
        """
        gate_name = gate_name.lower()

        # Build the qubit list
        if additional_qubits is None:
            qubits = [target_qubit]
        else:
            qubits = [target_qubit] + additional_qubits

        # Set default modifies_flags
        if modifies_flags is None:
            modifies_flags = [True] * len(qubits)

        # Add the instruction with cond_flag="p" (positive condition)
        # and the classical bit in the bits list
        self.add_instruction(
            name=gate_name,
            qubits=qubits,
            bits=[classical_bit],
            modifies_flags=modifies_flags,
            cond_flag="p",
            params=params,
        )

    def build_hdh(self, hdh_cls=HDH) -> HDH:
        """Translate the recorded instructions into an HDH.

        Qubit ``i`` and bit ``j`` become wires ``"q<i>"`` and ``"c<j>"``. A
        multi-qubit gate spans three timesteps as three hyperedge layers
        (``<name>_stage1``, ``_stage2``, ``_stage3``), so a partitioner can cut
        before, through or after it.

        Args:
            hdh_cls: HDH class to instantiate, for subclasses.
        """
        hdh = hdh_cls()
        qubit_time: Dict[int, int] = {}
        bit_time: Dict[int, int] = {}
        last_gate_input_time: Dict[int, int] = {}

        for name, qargs, cargs, modifies_flags, cond_flag, params in self.instructions:
            # --- Canonicalize inputs ---
            qargs = list(qargs or [])
            if name == "measure":
                cargs = list(cargs) if cargs is not None else qargs.copy()  # 1:1 map
                if len(cargs) != len(qargs):
                    raise ValueError("measure: len(bits) must equal len(qubits)")
                modifies_flags = [True] * len(qargs)
            else:
                cargs = list(cargs or [])
                if modifies_flags is None:
                    modifies_flags = [True] * len(qargs)
                elif len(modifies_flags) != len(qargs):
                    raise ValueError("len(modifies_flags) must equal len(qubits)")

            # Measurements
            if name == "measure":
                for i, qubit in enumerate(qargs):
                    # Use current qubit time (default 0), do NOT advance it here
                    t_in = qubit_time.get(qubit, 0)
                    q_in = f"q{qubit}_t{t_in}"

                    # Check if node already exists - preserve its potential status
                    if q_in not in hdh.nodes:
                        hdh.add_node(f"q{qubit}", t_in, "q", node_real="a")  # Default to actual

                    bit = cargs[i]
                    t_out = t_in + 1              # classical result at next tick
                    c_out = f"c{bit}_t{t_out}"
                    # Classical output is always actual - measurement is unconditional
                    hdh.add_node(f"c{bit}", t_out, "c", node_real=cond_flag)

                    # Measurement hyperedge is always actual - the operation itself is unconditional
                    # (even if measuring a potential quantum state)
                    hdh.add_hyperedge({q_in, c_out}, "c", name="measure", node_real=cond_flag)

                    # Next-free convention for this bit stream
                    bit_time[bit] = t_out + 1

                    # Important: do NOT set qubit_time[qubit] = t_in + k
                    # The quantum wire collapses; keep its last quantum tick unchanged.
                continue

            # Conditional gate handling
            if name != "measure" and cond_flag == "p" and cargs:
                # Supports 1 classical control; extend to many if you like
                ctrl = cargs[0]

                # Ensure times exist
                for q in qargs:
                    if q not in qubit_time:
                        qubit_time[q] = 0  # ← Initialize at t=0
                        last_gate_input_time[q] = 0  # ← Initialize at t=0

                # Classical node must already exist (e.g., produced by a prior measure)
                # bit_time points to "next free" slot; the latest existing node is at t = bit_time-1
                c_latest = bit_time.get(ctrl, 1) - 1
                cnode = f"c{ctrl}_t{c_latest}"
                hdh.add_node(f"c{ctrl}", c_latest, "c", node_real="a")  # Classical node is actual

                edges = []
                for tq in qargs:
                    # gate happens at next tick after both inputs are ready
                    t_in_q = qubit_time[tq]
                    t_gate = max(t_in_q, c_latest) + 1
                    qname = f"q{tq}"

                    # Create input quantum node (actual state before conditional)
                    qin = f"{qname}_t{t_in_q}"
                    hdh.add_node(qname, t_in_q, "q", node_real="a")

                    # Create output quantum node (potential state after conditional)
                    qout = f"{qname}_t{t_gate}"
                    hdh.add_node(qname, t_gate, "q", node_real=cond_flag)

                    # Add quantum hyperedge for wire continuity (potential)
                    q_edge = hdh.add_hyperedge({qin, qout}, "q", name=name, node_real=cond_flag)
                    edges.append(q_edge)

                    # Add classical hyperedge for conditional dependency (potential)
                    c_edge = hdh.add_hyperedge({cnode, qout}, "c", name=name, node_real=cond_flag)
                    edges.append(c_edge)

                    # advance time
                    last_gate_input_time[tq] = t_in_q
                    qubit_time[tq] = t_gate

                # store edge_args for reconstruction/debug
                q_with_time = [(q, qubit_time[q]) for q in qargs]
                c_with_time = [(ctrl, c_latest + 1)]  # next-free convention; adjust if you track exact
                for e in edges:
                    hdh.edge_args[e] = (q_with_time, c_with_time, modifies_flags or [True] * len(qargs))
                    if params:
                        hdh.gate_params[e] = params

                continue

            #Actualized gate (non-conditional)
            for q in qargs:
                if q not in qubit_time:
                    qubit_time[q] = 0  # ← Initialize at t=0
                    last_gate_input_time[q] = 0  # ← Initialize at t=0

            active_times = [qubit_time[q] for q in qargs]
            time_step = max(active_times) + 1 if active_times else 0

            in_nodes: List[str] = []
            out_nodes: List[str] = []

            intermediate_nodes: List[str] = []
            final_nodes: List[str] = []
            post_nodes: List[str] = []

            multi_gate = (name != "measure" and len(qargs) > 1)
            common_start = max((qubit_time.get(q, 0) for q in qargs), default=0) if multi_gate else None

            for i, qubit in enumerate(qargs):
                t_in = qubit_time[qubit]
                qname = f"q{qubit}"
                in_id = f"{qname}_t{t_in}"
                hdh.add_node(qname, t_in, "q", node_real=cond_flag)
                in_nodes.append(in_id)

                # choose timeline
                if multi_gate:
                    t1 = common_start + 1
                    t2 = common_start + 2
                    t3 = common_start + 3

                    # FIX ISSUE #37: Create intermediate nodes INSIDE loop for each qubit
                    mid_id   = f"{qname}_t{t1}"
                    final_id = f"{qname}_t{t2}"
                    post_id  = f"{qname}_t{t3}"

                    hdh.add_node(qname, t1, "q", node_real=cond_flag)
                    hdh.add_node(qname, t2, "q", node_real=cond_flag)
                    hdh.add_node(qname, t3, "q", node_real=cond_flag)

                    intermediate_nodes.append(mid_id)
                    final_nodes.append(final_id)
                    post_nodes.append(post_id)

                    last_gate_input_time[qubit] = t_in
                    qubit_time[qubit] = t3
                else:
                    # Single-qubit gates: don't create nodes here
                    # created by the single-qubit handler below
                    t1 = t_in + 1
                    t2 = t1 + 1
                    t3 = t2 + 1

            edges = []
            if len(qargs) > 1:
                # Multi-qubit gate
                # Stage 1: input → intermediate (1:1)
                for in_node, mid_node in zip(in_nodes, intermediate_nodes):
                    e = hdh.add_hyperedge({in_node, mid_node}, "q", name=f"{name}_stage1", node_real=cond_flag)
                    edges.append(e)

                # Stage 2: full multiqubit edge from intermediate → final
                e2 = hdh.add_hyperedge(set(intermediate_nodes) | set(final_nodes), "q", name=f"{name}_stage2", node_real=cond_flag)
                edges.append(e2)

                # Stage 3: final → post (1:1)
                for f_node, p_node in zip(final_nodes, post_nodes):
                    e = hdh.add_hyperedge({f_node, p_node}, "q", name=f"{name}_stage3", node_real=cond_flag)
                    edges.append(e)

            if name == "measure":
                for i, qubit in enumerate(qargs):
                    t_in = qubit_time.get(qubit, 0)
                    q_in = f"q{qubit}_t{t_in}"
                    hdh.add_node(f"q{qubit}", t_in, "q", node_real=cond_flag)

                    bit = cargs[i]
                    t_out = t_in + 1
                    c_out = f"c{bit}_t{t_out}"
                    hdh.add_node(f"c{bit}", t_out, "c", node_real=cond_flag)

                    hdh.add_hyperedge({q_in, c_out}, "c", name="measure", node_real=cond_flag)
                    bit_time[bit] = t_out + 1
                continue

            if name != "measure":
                for bit in cargs:
                    t = bit_time.get(bit, 0)
                    cname = f"c{bit}"
                    out_id = f"{cname}_t{t + 1}"
                    hdh.add_node(cname, t + 1, "c", node_real=cond_flag)
                    out_nodes.append(out_id)
                    bit_time[bit] = t + 1

            all_nodes = set(in_nodes) | set(out_nodes)
            if all(n.startswith("c") for n in all_nodes):
                edge_type = "c"
            elif any(n.startswith("c") for n in all_nodes):
                edge_type = "c"
            else:
                edge_type = "q"

            if len(qargs) == 1:
                # Single-qubit gate
                for i, qubit in enumerate(qargs):
                    if modifies_flags[i] and name != "measure":
                        # Use current qubit_time
                        t_in = qubit_time[qubit]  
                        t_out = t_in + 1
                        qname = f"q{qubit}"
                        in_id = f"{qname}_t{t_in}"
                        out_id = f"{qname}_t{t_out}"
                        hdh.add_node(qname, t_out, "q", node_real=cond_flag)
                        edge = hdh.add_hyperedge({in_id, out_id}, "q", name=name, node_real=cond_flag)
                        edges.append(edge)
                        # Update time for next gate
                        qubit_time[qubit] = t_out
                        last_gate_input_time[qubit] = t_in

            q_with_time = [(q, qubit_time[q]) for q in qargs]
            c_with_time = [(c, bit_time.get(c, 0)) for c in cargs]
            for edge in edges:
                hdh.edge_args[edge] = (q_with_time, c_with_time, modifies_flags)
                if params:
                    hdh.gate_params[edge] = params

        return hdh